Virtually all modern MOS and bipolar integrated circuits use the local oxidation of silicon (LOCOS) technique to develop regions which will laterally isolate the devices on the integrated circuit. This isolation structure is typically formed by ion-implantation doping of the field region, followed by the local growth of the thick field oxide. The active device regions are protected during these steps by masking layers of silicon nitride which are subsequently removed.
Unfortunately, the LOCOS process results in the lateral oxidation of the silicon underneath the nitride mask, forming the so-called "bird's beak effect". This effect is graphically illustrated in FIGS. 1 and 7 of U.S. Pat. No. 4,551,910. Since the "bird's beak" is insufficiently thick to form effective isolation, but sufficiently thick to prevent the formation of an active device where it is located, it reduces the effective device area and becomes one of the limiting factors in achieving high packing density for very large scale integrated circuits.
It has long been recognized in the prior art that it is desirable to reduce the bird's beak to minimize the transition regions between active areas. Other isolation technologies have been proposed as alternatives for LOCOS. For example, the side wall masked isolation (SWAMI) technique has been proposed which involves the addition of a second nitride layer on the side wall. See FIG. 2, p. 226, of K. Y. Chiu et al., "The SWAMI - A Defect Free and Near-Zero Bird's-Beak Local Oxidation Process and Its Application in VLSI Technology," IEDM 82 (International Electron Device Meeting, 1982), Sec. 9.3, pp. 224-227 (1982). Thus U.S. Pat. No. 4,477,310 shows the use of nitride layers on the side wall of active regions. However, fully recessed field oxide layers are formed from an unmasked silicon substrate.
Still another method described is the so-called sealed interface local oxidation (SILO) technique which uses three layers of nitride over silicon followed by an oxide layer and a cap nitride layer. See FIG. 1, p. 223, of J. Hui et al., "Electrical Properties of MOS Devices Made With SILO Technology," IEDM 82, Sec. 9.2, pp. 220-223 (1982).
Also, the buried oxide (BOX) technique has been devised which uses an aluminum mask to etch a silicon groove and the subsequent removal of a plasma deposited silicon dioxide layer. See FIG. 1, p. 386, of K. Kurosawa et al., "A New Bird's-Beak Free Field Isolation Technology for VLSI Devices," IEDM 81, Sec. 16.4, pp. 384-387 (1981). Still another technique involves the selective polysilicon oxidation using three layers of silicon dioxide over silicon followed by a polysilicon and cap nitride.
Unfortunately, the SILO technique is not fully effective because of contamination and defects at the silicon/nitride interface which cannot be easily controlled. The SWAMI and BOX techniques are far too complicated, the BOX technique requiring several masking steps to achieve good planarity.